วันจันทร์ที่ 9 กันยายน พ.ศ. 2556

Travel

   Now we at Sayaysom U-Thong, And I will going to The Demonstration school of Silapakorn University.

     Start at circle at U-Thong going on 321 road going down very long.


Turn left on this.


And turn left again to going to The Demonstration school of Silapakorn University.


And now we arrive!.


วันอังคารที่ 20 สิงหาคม พ.ศ. 2556

Domain Name System


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take advantage of this when they use meaningful Uniform Resource Locators (URLs) and e-mail addresses without having to know how the computer actually locates the services.
The Domain Name System distributes the responsibility of assigning domain names and mapping those names to IP addresses by designating authoritative name servers for each domain. Authoritative name servers are assigned to be responsible for their supported domains, and may delegate authority over subdomains to other name servers. This mechanism provides distributed and fault tolerant service and was designed to avoid the need for a single central database.
The Domain Name System also specifies the technical functionality of this database service. It defines the DNS protocol, a detailed specification of the data structures and data communication exchanges used in DNS, as part of the Internet Protocol Suite.
The Internet maintains two principal namespaces, the domain name hierarchy[1] and the Internet Protocol (IP) address spaces.[2] The Domain Name System maintains the domain name hierarchy and provides translation services between it and the address spaces. Internet name servers and a communication protocol implement the Domain Name System.[3] A DNS name server is a server that stores the DNS records for a domain name, such as address (A or AAAA) records, name server (NS) records, and mail exchanger (MX) records (see also list of DNS record types); a DNS name server responds with answers to queries against its database.

ระบบการตั้งชื่อโดเมน

จากวิกิพีเดีย สารานุกรมเสรี
The five-layer TCP/IP model
5. Application layer
DHCPDNSFTPGopherHTTPIMAP4IRCNNTPXMPPMIMEPOP3SIPSMTPSNMPSSHTELNETRPCRIPRTPRTCPTLS/SSLSDPSOAP
4. Transport layer
TCPUDPDCCPSCTPGTP
3. Internet layer
IP (IPv4IPv6) • IGMPICMPRSVPBGPOSPFISISIPsecARPRARP
2. Data link layer
802.11ATMDTMEthernetFDDIFrame RelayGPRSEVDOHSPAHDLCPPPL2TPPPTP
1. Physical layer
Ethernet physical layerISDNModemsPLCSONET/SDHG.709WiMAX
จัดการ: แม่แบบ  พูดคุย  แก้ไข
ระบบการตั้งชื่อโดเมน (อังกฤษ: Domain Name System: DNS) เป็นระบบที่ใช้เก็บข้อมูลของชื่อโดเมน (โดเมนเนม) ซึ่งใช้ในเครือข่ายขนาดใหญ่อย่างอินเทอร์เน็ต โดยข้อมูลที่เก็บมีหลายอย่าง แต่สิ่งสำคัญคือความสัมพันธ์ระหว่างชื่อโดเมนนั้นๆ กับหมายเลขไอพีที่ใช้งานอยู่ คำว่า DNS สามารถแทนความหมายได้ทั้ง Domain Name Service (บริการชื่อโดเมน) และ Domain Name Server (เครื่องบริการชื่อโดเมน) อีกด้วย
ประโยชน์ที่สำคัญของ DNS คือช่วยแปลงหมายเลขไอพีซึ่งเป็นชุดตัวเลขที่จดจำได้ยาก (เช่น 207.142.131.206) มาเป็นชื่อที่สามารถจดจำได้ง่ายแทน (เช่น wikipedia.org)

IP Address

IP Address คืออะไร  
       IP Address ย่อมาจากคำเต็มว่า Internet Protocal Address คือหมายเลขประจำเครื่องคอมพิวเตอร์แต่ละเครื่องในระบบเครือข่ายที่ใช้โปรโต คอลแบบ TCP/IP
ถ้า เปรียบเทียบก็คือบ้านเลขที่ของเรานั่นเอง ในระบบเครือข่าย จำเป็นจะต้องมีหมายเลข IP กำหนดไว้ให้กับคอมพิวเตอร์ และอุปกรณ์อื่นๆ ที่ต้องการ IP ทั้งนี้เวลามีการโอนย้ายข้อมูล หรือสั่งงานใดๆ จะสามารถทราบตำแหน่งของเครื่องที่เราต้องการส่งข้อมูลไป จะได้ไม่ผิดพลาดเวลาส่งข้อมูล ซึ่งประกอบด้วยตัวเลข 4 ชุด มีเครื่องหมายจุดขั้นระหว่างชุด  เช่น 192.168.100.1 หรือ 172.16.10.1  เป็นต้น  โดยหมายเลข IP Address ของเครื่องคอมพิวเตอร์แต่ละเครื่องจะมีค่าไม่ซ้ำกัน สิ่งตัวเลข 4 ชุดนี้บอก คือ Network ID กับ Host ID ซึ่งจะบอกให้รู้ว่า เครื่อง computer ของเราอยู่ใน network ไหน และเป็นเครื่องไหนใน network นั้น เราจะรู้ได้อย่างไรว่า Network ID และ Host ID มีค่าเท่าไหร่ ก็ขึ้นอยู่กับว่า IP Address นั้น อยู่ใน class อะไร
       เหตุที่ต้องมีการแบ่ง class ก็เพื่อให้เกิดความเป็นระเบียบ เป็นการแบ่ง IP Address ออกเป็นหมวดหมู่นั้นเอง สิ่งที่จะเป็นตัวจำแนก class ของ network ก็คือ bit ทางซ้ายมือสุดของตัวเลขตัวแรกของ IP Address (ที่แปลงเป็นเลขฐาน 2 แล้ว) นั่นเอง โดยที่ถ้า bit ทางซ้ายมือสุดเป็น 0 ก็จะเป็น class A ถ้าเป็น 10 ก็จะเป็น class B ถ้าเป็น 110 ก็จะเป็น class C ดังนั้น IP Address จะอยู่ใน class A ถ้าตัวเลขตัวแรกมีค่าได้ตั้งแต่ 0 ? 127 (000000002 ? 011111112) จะอยู่ใน class B ถ้าเลขตัวแรกมีค่าตั้งแต่ 128 ? 191 (100000002 ? 101111112) และ จะอยู่ใน class C ถ้าเลขตัวแรกมีค่าตั้งแต่ 192 - 223 (110000002 ? 110111112) มีข้อยกเว้นอยู่นิดหน่อยก็คือตัวเลข 0, 127 จะใช้ในความหมายพิเศษ จะไม่ใช้เป็น address ของ network ดังนั้น network ใน class A จะมีค่าตัวเลขตัวแรก ในช่วง 1 ? 126
       สำหรับตัวเลขตั้งแต่ 224 ขึ้นไป จะเป็น class พิเศษ  อย่างเช่น  Class D ซึ่งถูกใช้สำหรับการส่งข้อมูลแบบ Multicast ของบาง Application และ Class E ซึ่ง Class นี้เป็น Address ที่ถูกสงวนไว้ก่อน ยังไม่ถูกใช้งานจริง ๆ  โดย Class D และ Class E นี้เป็น Class พิเศษ ซึ่งไม่ได้ถูกนำมาใช้งานในภาวะปกติ

    ตัวอย่าง IP Address
    Class A ตั้งแต่ 10.xxx.xxx.xxx
    Class B ตั้งแต่ 172.16.xxx.xxx ถึง 172.31.xxx.xxx
    Class C ตั้งแต่ 192.168.0.xxx ถึง 192.168.255.xxx

       จาก IP Address เราสามารถที่จะบอก ได้คร่าวๆ ว่า computer 2 เครื่องอยู่ใน network วงเดียวกันหรือเปล่าโดยการเปรียบเทียบ Network ID ของ IP Address ถ้ามี Network ID ตรงกันก็แสดงว่าอยู่ใน network วงเดียวกัน เช่น computer เครื่องหนึ่งมี IP Address 1.2.3.4 จะอยู่ใน network วงเดียวกับอีกเครื่องหนึ่งซึ่งมี IP Address 1.100.150.200 เนื่องจากมี Network ID ตรงกันคือ 1 (class A ใช้ Network ID 1 byte)

    วิธีตรวจสอบ IP Address
    1.คลิกปุ่ม Start เลือก Run
    2.พิมพ์คำว่า cmd กดปุ่ม OK
    3.จะได้หน้าต่างสีดำ
    4.พิมพ์คำว่า ipconfig กด enter
    5.จะเห็นกลุ่มหมายเลข IP Address

วิธีตรวจสอบ IP Address ของเครื่อง

 วิธีตรวจสอบ IP Address ของเครื่อง
          IP Address คือหมายเลขที่สำคัญที่ทำให้เครื่องคอมพิวเตอร์ของเราสามารถใช้งานเครือข่าย และ Internet ได้ ซึ่งสามารถตรวจสอบได้ดังต่อไปนี้
 1. คลิกที่ปุ่ม Start => Run

 2. พิมพ์คำว่า cmd แล้วคลิกปุ่ม OK

 3. จะปรากฏหน้าจอ dos จากนั้นให้พิมพ์คำสั่ง ipconfig แล้ว enter
ตรงแถบสีแดงแสดงหมายเลข IP Address ของเครื่อง ซึ่งเป็นการรับค่าจาก DHCP Server โดยอัตโนมัติตอนเปิดเครื่อง หากปิดเครื่องเป็นเวลานานแล้วเปิดใหม่ IP Address ดังกล่าวอาจเป็นไปเป็นหมายเลขอื่น

Types of LAN Network

  1. The Basic LAN

    • An Ethernet jack looks like a phone jack, but wider.
      The basic type of LAN is connected by Ethernet cables to a router or hub (modern routers usually integrate hubs). A router allows all computers connected to it to access a high-speed modem connected to the router. Each computer has an IP (Internet Protocol) address, but a computer on the other side of the Internet will only see the router's IP address. This, and a router's built-in firewall, creates a safer environment for accessing the Internet. (Firewalls are used to filter out unauthorized access to the network.)

    Wired LAN Speeds and Connections

    • A wired connection has two common connection standards: 100BASE-T and 1000BASE-T. The first one transfers data at up to 100 megabits per second (Mb/s), and the second one transmits at 1000 Mb/s or 1 gigabit per second (Gb/s). The second one is also known as Gigabit Ethernet. Most modern motherboards integrate this into their circuitry, rather than requiring the user to obtain an Ethernet card. Ethernet cables can run hundreds of feet without losing signal quality.

    Wireless LAN

    • Wireless routers are handy for mobile devices.
      Another standard in the mix is wireless Ethernet. This allows you to cut out cables altogether. You can transmit data through walls, floors and ceilings without having to drill holes. It is handier for people who use laptops and other mobile devices, since they can just turn on the device and have access to the network without plugging everything in. However, the transfer speeds are not as fast. The fastest protocol, 802.11n, moves data at up to 300 Mb/s. Wireless Ethernet is also susceptible to interference from devices such as a microwave or cordless phone.

    Wireless Encryption

    • Furthermore, wireless Ethernet also requires encryption. Without it, anyone close enough to the wireless router can capture and read all the data going back and forth. For this reason, a wireless Ethernet user will want to use WPA2 encryption. Unfortunately, it is possible to break into a WPA2 network by using a brute force attack. This method uses software that sends a constant stream of password guessing to the router until it finds the right one. A wireless network administrator should use a password that is difficult to guess.

    Corporate LANs

    • Wired LAN connections are capable of even higher speeds, although these are usually limited to corporate environments. 10 Gigabit Ethernet enters the picture here, as does Fibre Channel, which is popular in Hollywood's digital post-production facilities dealing with editing and special effects.

Lan component

  1. Network Cards

    • At the most basic level, a network card is a component that allows the computer to communicate across a network. This component is frequently built into the motherboard of today's computers, but it can also be a separate card for use in a PCI slot, or part of an external unit that connects to the computer via a USB port. Network cards are further categorized according to whether they operate on wired or wireless networks. However, some cards do support both wireless and wired networking.

    Network Cables

    • Network cables are the physical lines used to carry information between computers in a wired LAN. The cables are labeled by their category and are commonly referred to as CatX--where X is the category number--cable. The most commonly used type in 2010 is Cat5, although other categories with different properties do exist.

    Network Hubs

    • A network hub acts as a centralized point for data transmission to computers in a LAN. When data from one computer reaches the hub it is broadcast to every computer in the network regardless of where the data is intended to go. Network bandwidth on LANs using a network hub is shared, which means that four computers on a hub will each get one-quarter the total bandwidth available on the hub.

    Network Switches

    • An alternative to the network hub is the network switch. Switches represent a newer networking technology that assigns each computer in the network a specific MAC address. This allows LANs using a network switch to route information to individual computers. Because network switches do not broadcast to every computer on the network, they can simultaneously allot their full bandwidth to each computer.

    Routers

    • Unlike switches and hubs, network routers are used to connect networks to one another, rather than connecting computers in a single network. Routers can connect groups of computers that are separated by a wall or by an ocean. They are most commonly found in the home, where they facilitate the connection of home computers to the Internet; however, they can be used to connect networks of any kind. Most modern network routers are actually combination units that contain a router and a network switch, in addition to a handful of other networking-related tools such as a DHCP server and a firewall.

Digital signal processor

Typical characteristics

A typical digital processing system
Digital signal processing algorithms typically require a large number of mathematical operations to be performed quickly and repeatedly on a series of data samples. Signals (perhaps from audio or video sensors) are constantly converted from analog to digital, manipulated digitally, and then converted back to analog form. Many DSP applications have constraints on latency; that is, for the system to work, the DSP operation must be completed within some fixed time, and deferred (or batch) processing is not viable.
Most general-purpose microprocessors and operating systems can execute DSP algorithms successfully, but are not suitable for use in portable devices such as mobile phones and PDAs because of power supply and space constraints[citation needed]. A specialized digital signal processor, however, will tend to provide a lower-cost solution, with better performance, lower latency, and no requirements for specialized cooling or large batteries[citation needed].
The architecture of a digital signal processor is optimized specifically for digital signal processing. Most also support some of the features as an applications processor or microcontroller, since signal processing is rarely the only task of a system. Some useful features for optimizing DSP algorithms are outlined below.

Architecture

By the standards of general-purpose processors, DSP instruction sets are often highly irregular. One implication for software architecture is that hand-optimized assembly-code routines are commonly packaged into libraries for re-use, instead of relying on advanced compiler technologies to handle essential algorithms.
Hardware features visible through DSP instruction sets commonly include:
  • Hardware modulo addressing, allowing circular buffers to be implemented without having to constantly test for wrapping.
  • A memory architecture designed for streaming data, using DMA extensively and expecting code to be written to know about cache hierarchies and the associated delays.
  • Driving multiple arithmetic units may require memory architectures to support several accesses per instruction cycle
  • Separate program and data memories (Harvard architecture), and sometimes concurrent access on multiple data busses
  • Special SIMD (single instruction, multiple data) operations
  • Some processors use VLIW techniques so each instruction drives multiple arithmetic units in parallel
  • Special arithmetic operations, such as fast multiply–accumulates (MACs). Many fundamental DSP algorithms, such as FIR filters or the Fast Fourier transform (FFT) depend heavily on multiply–accumulate performance.
  • Bit-reversed addressing, a special addressing mode useful for calculating FFTs
  • Special loop controls, such as architectural support for executing a few instruction words in a very tight loop without overhead for instruction fetches or exit testing
  • Deliberate exclusion of a memory management unit. DSPs frequently use multi-tasking operating systems, but have no support for virtual memory or memory protection. Operating systems that use virtual memory require more time for context switching among processes, which increases latency.

Program flow

Memory architecture

Data operations

  • Saturation arithmetic, in which operations that produce overflows will accumulate at the maximum (or minimum) values that the register can hold rather than wrapping around (maximum+1 doesn't overflow to minimum as in many general-purpose CPUs, instead it stays at maximum). Sometimes various sticky bits operation modes are available.
  • Fixed-point arithmetic is often used to speed up arithmetic processing
  • Single-cycle operations to increase the benefits of pipelining

Instruction sets

History

Prior to the advent of stand-alone DSP chips discussed below, most DSP applications were implemented using bit-slice processors. The AMD 2901 bit-slice chip with its family of components was a very popular choice. There were reference designs from AMD, but very often the specifics of a particular design were application specific. These bit slice architectures would sometimes include a peripheral multiplier chip. Examples of these multipliers were a series from TRW including the TDC1008 and TDC1010, some of which included an accumulator, providing the requisite multiply–accumulate (MAC) function.
In 1976, Richard Wiggins proposed the Speak & Spell concept to Paul Breedlove, Larry Brantingham, and Gene Frantz at Texas Instrument's Dallas research facility. Two years later in 1978 they produced the first Speak & Spell, with the technological centerpiece being the TMS5100,[3] the industry's first digital signal processor. It also set other milestones, being the first chip to use Linear predictive coding to perform speech synthesis.[4]
In 1978, Intel released the 2920 as an "analog signal processor". It had an on-chip ADC/DAC with an internal signal processor, but it didn't have a hardware multiplier and was not successful in the market. In 1979, AMI released the S2811. It was designed as a microprocessor peripheral, and it had to be initialized by the host. The S2811 was likewise not successful in the market.
In 1980 the first stand-alone, complete DSPs – the NEC µPD7720 and AT&T DSP1 – were presented at the International Solid-State Circuits Conference '80. Both processors were inspired by the research in PSTN telecommunications.
The Altamira DX-1 was another early DSP, utilizing quad integer pipelines with delayed branches and branch prediction.
Another DSP produced by Texas Instruments (TI), the TMS32010 presented in 1983, proved to be an even bigger success. It was based on the Harvard architecture, and so had separate instruction and data memory. It already had a special instruction set, with instructions like load-and-accumulate or multiply-and-accumulate. It could work on 16-bit numbers and needed 390 ns for a multiply–add operation. TI is now the market leader in general-purpose DSPs.
About five years later, the second generation of DSPs began to spread. They had 3 memories for storing two operands simultaneously and included hardware to accelerate tight loops, they also had an addressing unit capable of loop-addressing. Some of them operated on 24-bit variables and a typical model only required about 21 ns for a MAC. Members of this generation were for example the AT&T DSP16A or the Motorola 56000.
The main improvement in the third generation was the appearance of application-specific units and instructions in the data path, or sometimes as coprocessors. These units allowed direct hardware acceleration of very specific but complex mathematical problems, like the Fourier-transform or matrix operations. Some chips, like the Motorola MC68356, even included more than one processor core to work in parallel. Other DSPs from 1995 are the TI TMS320C541 or the TMS 320C80.
The fourth generation is best characterized by the changes in the instruction set and the instruction encoding/decoding. SIMD extensions were added, VLIW and the superscalar architecture appeared. As always, the clock-speeds have increased, a 3 ns MAC now became possible.

Modern DSPs

Modern signal processors yield greater performance; this is due in part to both technological and architectural advancements like lower design rules, fast-access two-level cache, (E)DMA circuitry and a wider bus system. Not all DSP's provide the same speed and many kinds of signal processors exist, each one of them being better suited for a specific task, ranging in price from about US$1.50 to US$300
Texas Instruments produces the C6000 series DSP’s, which have clock speeds of 1.2 GHz and implement separate instruction and data caches. They also have an 8 MiB 2nd level cache and 64 EDMA channels. The top models are capable of as many as 8000 MIPS (instructions per second), use VLIW (very long instruction word), perform eight operations per clock-cycle and are compatible with a broad range of external peripherals and various buses (PCI/serial/etc). TMS320C6474 chips each have three such DSPs, and the newest generation C6000 chips support floating point as well as fixed point processing.
Freescale produces a multi-core DSP family, the MSC81xx. The MSC81xx is based on StarCore Architecture processors and the latest MSC8144 DSP combines four programmable SC3400 StarCore DSP cores. Each SC3400 StarCore DSP core has a clock speed of 1 GHz.
XMOS produces a multi-core multi-threaded line of processor well suited to DSP operations, They come in various speeds ranging from 400 to 1600 MIPS. The processors have a multi-threaded architecture that allows up to 8 real-time threads per core, meaning that a 4 core device would support up to 32 real time threads. Threads communicate between each other with buffered channels that are capable of up to 80 Mbit/s. The devices are easily programmable in C and aim at bridging the gap between conventional micro-controllers and FPGA's
CEVA, Inc. produces and licenses three distinct families of DSPs. Perhaps the best known and most widely deployed is the CEVA-TeakLite DSP family, a classic memory-based architecture, with 16-bit or 32-bit word-widths and single or dual MACs. The CEVA-X DSP family offers a combination of VLIW and SIMD architectures, with different members of the family offering dual or quad 16-bit MACs. The CEVA-XC DSP family targets Software-defined Radio (SDR) modem designs and leverages a unique combination of VLIW and Vector architectures with 32 16-bit MACs.
Analog Devices produce the SHARC-based DSP and range in performance from 66 MHz/198 MFLOPS (million floating-point operations per second) to 400 MHz/2400 MFLOPS. Some models support multiple multipliers and ALUs, SIMD instructions and audio processing-specific components and peripherals. The Blackfin family of embedded digital signal processors combine the features of a DSP with those of a general use processor. As a result, these processors can run simple operating systems like μCLinux, velOSity and Nucleus RTOS while operating on real-time data.
NXP Semiconductors produce DSP's based on TriMedia VLIW technology, optimized for audio and video processing. In some products the DSP core is hidden as a fixed-function block into a SoC, but NXP also provides a range of flexible single core media processors. The TriMedia media processors support both fixed-point arithmetic as well as floating-point arithmetic, and have specific instructions to deal with complex filters and entropy coding.
CSR produces the Quatro family of SOC's that contain one or more custom Imaging DSP's optimized for processing document image data for scanner and copier applications.
Most DSP's use fixed-point arithmetic, because in real world signal processing the additional range provided by floating point is not needed, and there is a large speed benefit and cost benefit due to reduced hardware complexity. Floating point DSP's may be invaluable in applications where a wide dynamic range is required. Product developers might also use floating point DSP's to reduce the cost and complexity of software development in exchange for more expensive hardware, since it is generally easier to implement algorithms in floating point.
Generally, DSP's are dedicated integrated circuits; however DSP functionality can also be produced by using field-programmable gate array chips (FPGA’s).
Embedded general-purpose RISC processors are becoming increasingly DSP like in functionality. For example, the ARM Cortex-A8 and the OMAP3 processors include a Cortex-A8 and C6000 DSP.
In Communications a new breed of DSP's offering the fusion of both DSP functions and H/W acceleration function is making its way into the mainstream. Such Modem processors include ASOCS ModemX and CEVA's XC4000.